MIL-STD-188-176 Asynchronous Transfer Mode ATM, Standardized Profile for No S/S DocumentThe purpose of this military standard MIL-STD is to provide a profile of applicable standards to be used by all Department of Defense DOD activities and associated organizations when acquiring asynchronous transfer mode ATM products, systems, or services.

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MIL-STD-188-176

5.1.1.4 SONET-based STS-1 physical layer interface (UTP-3) . This section provides a 51.84-Mbps interface over Category 3 unshielded twisted pair.

5.1.1.4.1 TC sublayer for SONET-based STS-1 interface . The

TC sublayer functions shall be in accordance with

AF-PHY-0018.000, section 3.

5.1.1.4.2 PMD sublayer for SONET-based STS-1 interface . The PMD sublayer interface shall be in accordance with AF-PHY-

0018.000, section 2. Extensions to support operation at 25.92- Mbps or 12.96-Mbps rates are optional.

5.1.1.5 DS-3 Direct Mapped physical layer interface (coaxial) . This section provides a 44.736-Mbps interface over coaxial cable.

5.1.1.5.1 TC sublayer for DS-3 Direct Mapped interface . ATM cells shall be directly mapped into the DS-3 payload. The octet structure of the cells shall be aligned with the nibble structure of the DS-3 M-frame. The M-frame is organized such

that 84 bits of payload follow every overhead bit in accordance with ANSI T1.107, section 8.1. The 84 bits shall be organized into 21 consecutive nibbles. ATM cells may cross M-frame boundaries. The bit rate available for the transport of ATM cells is nominally 44.21 Mbps. The DS-3 interface format uses

C-bit parity application, as described in ANSI T1.107a.

5.1.1.5.2 PMD sublayer for DS-3 Direct Mapped interface . The electrical interface for directly mapped DS-3 shall be in accordance with T1.404 for network interfaces and T1.102 for customer installations.

5.1.1.6 E-1 physical layer interface . This section provides a 2.048-Mbps interface based on ITU-T G.704.

5.1.1.6.1 TC sublayer for E-1 interface . The TC sublayer shall provide the functions of ATM cell mapping, cell rate decoupling, cell delineation, and HEC generation/verification, in accordance with ITU-T G.704 and ITU-T I.432. The frame format shall be in accordance with Figure 7 of MIL-STD-187-700A, and defined in ITU-T G.704. ATM cells shall be mapped into time

slots 1 through 31 of the E1 frame so that the octet structure of the ATM cell is aligned with the octet structure of the E1 frame. Time slot 0 is reserved for frame alignment signals.

5.1.1.6.2 PMD sublayer for E-1 interface . The E-1 physical media-dependent interface shall be in accordance with ITU G.703.